Smart ‘Fpga’ NIC

I am working on a 5-part series for how to turn your existing FPGA Board into an FPGA Accelerated Network card, or into a ‘Smart-NIC’ that will parse and normalize multiple Market Data Feeds and maintain an order book.

Note: Part 2 is available now, but it includes all the code/IP for Part 1, I just did not get around to documenting part 1.  I will make some nice documentation and test simulations for Part 1, and then I will get to Part 4.

Here is a High-Level Diagram of the entire system:

Each of the following pages will go over a specific portion of this system.

 

Part 1: Udp/Ip Parser

This part will go over how I used the LabVIEW FPGA Network library to listen on a specific MAC address, IP Address, and port to retrieve UDP data.

 

Part 2: BATS PITCH Parser/Normalizer

This part I show how I took the raw UDP payload from step 1 and parse each BATS PITCH message and send a normalized format out, which in part 4 is wired to an OrderBook.

Part 3: NASDAQ ITCH Parser/Normalizer

Same thing as part 2, but this time I take NASDAQ messages and parse/normalize them so that a combined OrderBook can be created.

 

Part 4: Order Book

The BATS Normalizer and the NASDAQ Normalizer send Order Book ‘commands’, these commands add/edit/remove entries in the Order Book.  A User App is a consumer of this data, so the User App will send a different set of commands, which right now are ‘Get.Top’, and ‘Get.All’.  These commands come with a Symbol ID to tell the Order Book to get the best buy/sell or the entire Order Book for a specific symbol.  Finally an Arbitrator is placed in the middle to handle one or more

Part 5: Application

This part will put everything together and show how to create an application that communicates with a host (.exe/binary) on a Windows/Linux system – or to another FPGA IP