{"id":20062,"date":"2026-10-26T22:29:46","date_gmt":"2026-10-27T02:29:46","guid":{"rendered":"http:\/\/fpganow.com\/index.php\/run-on-hardware\/"},"modified":"2026-10-26T22:29:46","modified_gmt":"2026-10-27T02:29:46","slug":"run-on-hardware","status":"publish","type":"page","link":"https:\/\/fpganow.com\/index.php\/run-on-hardware\/","title":{"rendered":"Run on Hardware"},"content":{"rendered":"<p class=\"wp-block-paragraph\">Pick one of the pre-recorded CBOE PITCH captures, the parser implementation and the board. The capture is replayed over the 10 Gigabit Ethernet cable into the live FPGA, and every message the parser emits comes back with the time it was received and the time it was parsed, in ticks of 6.4 ns of the 156.25 MHz MAC clock.<\/p>    <div class=\"fpganow-hwrun\" id=\"fpganow-hwrun\">\n      <form class=\"hwrun-form\" autocomplete=\"off\">\n        <div class=\"hwrun-field\"><label for=\"hwrun-pcap\">Test capture (pcap)<\/label>\n          <select id=\"hwrun-pcap\" name=\"pcap\" required><option>loading...<\/option><\/select>\n          <p class=\"hwrun-help\" id=\"hwrun-pcap-help\"><\/p><\/div>\n        <div class=\"hwrun-field\"><label for=\"hwrun-impl\">Parser implementation<\/label>\n          <select id=\"hwrun-impl\" name=\"implementation\" required><\/select>\n          <p class=\"hwrun-help\" id=\"hwrun-impl-help\"><\/p><\/div>\n        <div class=\"hwrun-field\"><label for=\"hwrun-board\">Board<\/label>\n          <select id=\"hwrun-board\" name=\"board\" required><\/select>\n          <p class=\"hwrun-help\" id=\"hwrun-board-help\"><\/p><\/div>\n        <div class=\"hwrun-field\" id=\"hwrun-speed-field\" hidden><label for=\"hwrun-speed\">Playback speed<\/label>\n          <select id=\"hwrun-speed\" name=\"speed\"><\/select>\n          <p class=\"hwrun-help\" id=\"hwrun-speed-help\"><\/p><\/div>\n        <div class=\"hwrun-actions\">\n          <button type=\"submit\" class=\"hwrun-run button\" id=\"hwrun-run\">Run on hardware<\/button>\n          <span class=\"hwrun-status\" id=\"hwrun-status\"><\/span>\n        <\/div>\n      <\/form>\n      <pre class=\"hwrun-log\" id=\"hwrun-log\" hidden><\/pre>\n      <div class=\"hwrun-results\" id=\"hwrun-results\" hidden>\n        <h3>Result<\/h3>\n        <div class=\"hwrun-cards\" id=\"hwrun-cards\"><\/div>\n        <div class=\"hwrun-toolbar\">\n          <a class=\"button\" id=\"hwrun-csv\" href=\"#\" download>Download CSV<\/a>\n          <button type=\"button\" class=\"button\" id=\"hwrun-report-toggle\">Show scorer report<\/button>\n          <label class=\"hwrun-metric\">Chart: <select id=\"hwrun-metric\">\n            <option value=\"latency_ns\">recv &rarr; parse latency per message (ns)<\/option>\n            <option value=\"since_frame_start_ns\">time since the frame's first message (ns)<\/option>\n          <\/select><\/label>\n        <\/div>\n        <pre class=\"hwrun-report\" id=\"hwrun-report\" hidden><\/pre>\n        <div class=\"hwrun-chart-wrap\"><canvas id=\"hwrun-chart\"><\/canvas><\/div>\n        <h4>Per frame<\/h4>\n        <div class=\"hwrun-table-wrap hwrun-frames\"><table id=\"hwrun-frames\"><\/table><\/div>\n        <h4>Messages<\/h4>\n        <div class=\"hwrun-table-wrap hwrun-messages\"><table id=\"hwrun-table\"><\/table><\/div>\n      <\/div>\n    <\/div>\n    \n","protected":false},"excerpt":{"rendered":"<p>Pick one of the pre-recorded CBOE PITCH captures, the parser implementation and the board. The capture is replayed over the 10 Gigabit Ethernet cable into the live FPGA, and every message the parser emits comes back with the time it was received and the time it was parsed, in ticks of 6.4 ns of the &#8230; <a title=\"Run on Hardware\" class=\"read-more\" href=\"https:\/\/fpganow.com\/index.php\/run-on-hardware\/\" aria-label=\"Read more about Run on Hardware\">Read more<\/a><\/p>\n","protected":false},"author":0,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_coblocks_attr":"","_coblocks_dimensions":"","_coblocks_responsive_height":"","_coblocks_accordion_ie_support":"","footnotes":""},"class_list":["post-20062","page","type-page","status-publish"],"_links":{"self":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/pages\/20062","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/types\/page"}],"replies":[{"embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/comments?post=20062"}],"version-history":[{"count":0,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/pages\/20062\/revisions"}],"wp:attachment":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/media?parent=20062"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}