{"id":267,"date":"2017-08-22T12:24:43","date_gmt":"2017-08-22T12:24:43","guid":{"rendered":"http:\/\/fpganow.com\/?p=267"},"modified":"2017-08-22T12:25:28","modified_gmt":"2017-08-22T12:25:28","slug":"new-code-added-to-github-microblaze-mcs-io-bus-and-labview","status":"publish","type":"post","link":"https:\/\/fpganow.com\/index.php\/2017\/08\/22\/new-code-added-to-github-microblaze-mcs-io-bus-and-labview\/","title":{"rendered":"New Code Added to GitHub &#8211; MicroBlaze MCS, IO Bus and LabVIEW"},"content":{"rendered":"<p>I just uploaded some code to GitHub that is a full demonstration on how to use LabVIEW FPGA 2017, the MicroBlaze MCS core and the IO Bus that is attached to the MicroBlaze MCS.<\/p>\n<p>Clone the following repository:<\/p>\n<p><a href=\"https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/tree\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus\">https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/tree\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus<\/a><\/p>\n<p>and open the LabVIEW project:<\/p>\n<p><a href=\"https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/blob\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus\/02_MicroBlaze_Mcs_IO_Bus.lvproj\">https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/blob\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus\/02_MicroBlaze_Mcs_IO_Bus.lvproj<\/a><\/p>\n<p>Look at the Vivado 2015.4 project:<\/p>\n<p><a href=\"https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/blob\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus.xpr\">https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/blob\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus.xpr<\/a><\/p>\n<p>And finally, using the Xilinx SDK set your workspace to:<\/p>\n<p><a href=\"https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/tree\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus.sdk\">https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/tree\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus.sdk<\/a><\/p>\n<p>Now if you do not have access to LabVIEW from your current machine, I have included a screen shot for each VI with the words &#8220;Front&#8221; or &#8220;Back&#8221; added to the filename, and in the case where there are many case structures, I have added the case structure element number.<\/p>\n<p>The example has three features:<\/p>\n<ul class=\"ili-indent\">\n<li>Send a packet of data over the IO Bus to the MicroBlaze MCS and read the same packet back over the IO Bus<\/li>\n<li>Write a value to GPI channel #1 and read the value multiplied by 2 over GPO channel #2<\/li>\n<li>Read the values of GPO channels 1, 2, and 3<\/li>\n<\/ul>\n<p>Now I am continuing to work on integrating the 10 gigabit ports with the MicroBlaze MCS and to get the lwip TCP\/IP stack working on this board &#8211; NI PXIe-6592R.<\/p>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>I just uploaded some code to GitHub that is a full demonstration on how to use LabVIEW FPGA 2017, the MicroBlaze MCS core and the IO Bus that is attached to the MicroBlaze MCS. Clone the following repository: https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/tree\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus and open the LabVIEW project: https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/blob\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus\/02_MicroBlaze_Mcs_IO_Bus.lvproj Look at the Vivado 2015.4 project: https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/blob\/master\/05_MicroBlaze_Mcs\/02_MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus\/MicroBlaze_Mcs_IO_Bus.xpr And finally, using &#8230; <a title=\"New Code Added to GitHub &#8211; MicroBlaze MCS, IO Bus and LabVIEW\" class=\"read-more\" href=\"https:\/\/fpganow.com\/index.php\/2017\/08\/22\/new-code-added-to-github-microblaze-mcs-io-bus-and-labview\/\" aria-label=\"Read more about New Code Added to GitHub &#8211; MicroBlaze MCS, IO Bus and LabVIEW\">Read more<\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_coblocks_attr":"","_coblocks_dimensions":"","_coblocks_responsive_height":"","_coblocks_accordion_ie_support":"","footnotes":""},"categories":[7,10,6,9],"tags":[],"class_list":["post-267","post","type-post","status-publish","format-standard","hentry","category-fpga","category-io-bus","category-labview","category-microblaze-mcs","masonry-post","generate-columns","tablet-grid-50","mobile-grid-100","grid-parent","grid-50"],"_links":{"self":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts\/267","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/comments?post=267"}],"version-history":[{"count":1,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts\/267\/revisions"}],"predecessor-version":[{"id":268,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts\/267\/revisions\/268"}],"wp:attachment":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/media?parent=267"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/categories?post=267"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/tags?post=267"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}