- \n
- Check if any new ethernet frames have been received, and display the information, including the raw bytes of any such received frame<\/li>\n
- Send a raw ethernet frame out of Port 0<\/li>\n<\/ul>\n
I have included the necessary code to parse and generate the following types of packets, enabling you to communicate with another computer on your network that supports:<\/p>\n
- \n
- Ethernet II<\/li>\n
- ARP<\/li>\n
- ICMP<\/li>\n
- IPv4<\/li>\n
- UDP<\/li>\n<\/ul>\n
The VI’s to do this are located in the directory “Tests\/MAC\/Protocols”, simply wire the incoming frame data to the “Parse” VI’s, or write the parameters in to the “Create” VI’s.<\/p>\n
![\"\"](\"http:\/\/fpganow.com\/wp-content\/uploads\/2018\/02\/Supported-Protocols-1.png\")
<\/p>\nHow to Parse Incoming Ethernet Frames<\/strong><\/p>\n
For an example of how to parse an incoming frame see the “Poll RX” case inside the bottom While Loop of the “MAC-Tester<\/a>” vi:<\/p>\n
![\"\"](\"http:\/\/fpganow.com\/wp-content\/uploads\/2018\/02\/Process-ARP-1-1024x591.png\")
<\/a><\/p>\nHow to Create Ethernet Frames<\/strong><\/p>\n
For an example of how to create a valid outgoing ethernet frame with a valid CRC32 on the end, see the “Transmit Packet” case inside the bottom While Loop of the “MAC-Tester<\/a>” vi:<\/p>\n
![\"\"](\"http:\/\/fpganow.com\/wp-content\/uploads\/2018\/02\/Transmit-UDP.png\")
<\/p>\nThis vi calls the “UDP-Create.vi” and wires the size – in bytes – and the frame data in 64-bit words to the transmit FIFO.<\/p>\n
Full Source Code<\/strong><\/p>\n
See the source code on GitHub here:<\/p>\n
https:\/\/github.com\/JohnStratoudakis\/LabVIEW_Fpga\/tree\/master\/07_10_Gigabit_CLIP<\/a><\/p>\n
See the README.md<\/strong><\/a> for more documentation.<\/p>\n
Next?<\/strong><\/p>\n
Now I have to take this code and wire it up to my MicroBlaze implementation that also sits inside the FPGA project.\u00a0 Only problem right now is that I have only figured out how to configure a 32-bit FIFO, and not a 64-bit FIFO.\u00a0 So I can either do some sort of translation inside the FPGA or hope and get lucky by configuring the FIFO to be 64 bits wide.\u00a0 Note: by FIFO, I am referring to an AXI-Stream FIFO.<\/p>\n","protected":false},"excerpt":{"rendered":"
So here is the most simple, FPGA-based Network Interface Card that I know of. This application will start Port 0 of the 10 Gigabit Network interface that is provided by the PXIe-6592R\u00a0(http:\/\/www.ni.com\/en-us\/support\/model.pxie-6592.html) board by National Instruments,\u00a0and will allow you to do any of the following: Check if any new ethernet frames have been received, and … Read more<\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_coblocks_attr":"","_coblocks_dimensions":"","_coblocks_responsive_height":"","_coblocks_accordion_ie_support":"","footnotes":""},"categories":[1],"tags":[],"class_list":["post-301","post","type-post","status-publish","format-standard","hentry","category-uncategorized","masonry-post","generate-columns","tablet-grid-50","mobile-grid-100","grid-parent","grid-50"],"_links":{"self":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts\/301","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/comments?post=301"}],"version-history":[{"count":6,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts\/301\/revisions"}],"predecessor-version":[{"id":312,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts\/301\/revisions\/312"}],"wp:attachment":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/media?parent=301"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/categories?post=301"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/tags?post=301"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}