{"id":325,"date":"2018-02-13T13:26:24","date_gmt":"2018-02-13T13:26:24","guid":{"rendered":"http:\/\/fpganow.com\/?p=325"},"modified":"2018-02-13T14:14:16","modified_gmt":"2018-02-13T14:14:16","slug":"axi4-microblaze-64-bit","status":"publish","type":"post","link":"https:\/\/fpganow.com\/index.php\/2018\/02\/13\/axi4-microblaze-64-bit\/","title":{"rendered":"AXI4 + MicroBlaze != 64-bit"},"content":{"rendered":"

The 10 Gigabit MAC\/transceiver gives me 64 bit data words.\u00a0 I currently think I am giving and getting\u00a0 64 bit data words, but I am really only using 32 bits.\u00a0 I came to this conclusion after I tried reading a 64 bit word and saw the data was simply two repeated 32 bit words.\u00a0 Additionally some random person on the internet said that the MicroBlaze data bus is 32-bit and you have to use some sort of data width converter ip.<\/p>\n

Out of luck… I don’t know how to use the converter, but I am sure there is a way to properly convert this by using LabVIEW FPGA.\u00a0 So for starters, this means I can remove my AXI4 Stream Data FIFOs and keep the two 32-bit versions.\u00a0 I’ll also throw in support for TKEEP while I am at it.<\/p>\n

So the “Receive Ethernet Frame” code from the 10 Gigabit transceiver\/MAC looks like this:<\/p>\n

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I have to convert this 64-bit data stream in to a 32-bit data stream before I send it in to the MicroBlaze.\u00a0 Here is the current\/erroneous implementation:<\/p>\n

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So what do I have to do? I have to read one element from the LabVIEW FIFO – the FIFO on the left, write the upper half of the 32 bit word in one cycle, and not read from the LabVIEW FIFO for the next clock cycle and to write the lower half of the 32 bit word.\u00a0 Want to see the power of LabVIEW? It is 7:22 AM right now… [elevator music\/jeopardy music starts playing in the background]<\/p>\n

Now it is 8:07 AM and I have finished re-factoring this loop.\u00a0 I am writing the upper half of each 64 bit word in one cycle, and am writing the bottom half during the next clock cycle.\u00a0 I am also keeping the logic that appends an extra word which contains the “EndOfGoodFrame”, and “EndOfBadFrame” boolean values.\u00a0 Since I am writing 32-bit words now, I am only appending one word.<\/p>\n

Here is the full loop:<\/p>\n

\"\"<\/a><\/p>\n

And a close up of Case 0 of the innermost Case Structure:<\/p>\n

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And a close up of Case 1:<\/p>\n

\"\"<\/a><\/p>\n

I now have to do this for the other direction – convert a LabVIEW FIFO packet to an AXI 32-bit stream. Here is the current implementation:<\/p>\n

\"\"<\/a><\/p>\n

The signal on AXI_STR_TXD_data is a U32 and I have to collect 2 of these values and insert them in to the FIFO on the right side.\u00a0 I am going to have to think about this for a bit, but I have to get ready and go to work.\u00a0 So I may not finish this before leaving.<\/p>\n

Thanks and have a nice day!<\/p>\n

Update:<\/strong> Okay, this is not that pretty, but here is my first-cut “20 minutes” version:<\/p>\n

\"\"<\/a><\/p>\n

Now I have to go and get ready! But I’ll be sure to set everything to synthesize before I leave…<\/p>\n","protected":false},"excerpt":{"rendered":"

The 10 Gigabit MAC\/transceiver gives me 64 bit data words.\u00a0 I currently think I am giving and getting\u00a0 64 bit data words, but I am really only using 32 bits.\u00a0 I came to this conclusion after I tried reading a 64 bit word and saw the data was simply two repeated 32 bit words.\u00a0 Additionally … Read more<\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_coblocks_attr":"","_coblocks_dimensions":"","_coblocks_responsive_height":"","_coblocks_accordion_ie_support":"","footnotes":""},"categories":[7,6,8],"tags":[],"class_list":["post-325","post","type-post","status-publish","format-standard","hentry","category-fpga","category-labview","category-microblaze","masonry-post","generate-columns","tablet-grid-50","mobile-grid-100","grid-parent","grid-50"],"_links":{"self":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts\/325","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/comments?post=325"}],"version-history":[{"count":6,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts\/325\/revisions"}],"predecessor-version":[{"id":338,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/posts\/325\/revisions\/338"}],"wp:attachment":[{"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/media?parent=325"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/categories?post=325"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/fpganow.com\/index.php\/wp-json\/wp\/v2\/tags?post=325"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}