I made a quick YouTube playlist describing how to use the IP Integration Node to import: a single vhdl file from a Vivado project via a Netlist (.edn) file a single vhdl file from a Vivado project via a Design Checkpoint (.dcp) file a block design with custom Xilinx IP (AdderSubtractor) from a Vivado project … Read more
I just created a ‘Page’ as opposed to a WordPress ‘Post’ documenting how I was able to parse BATS Market Data messages. This new style or format will be much better than my writing multiples posts. Easier for the reader to find, and easier for me to find and to update an article. Anyway, look … Read more
Source Code: https://github.com/fpganow/Blink_LEDS Introduction There is a saying out there that goes ‘what are you going to do with an FPGA, blink a bunch of LEDs?’ Well… that saying is true. Today I purchased a breakout board for the Zynberry and found an excellent guide on how to do just that: https://svenssonjoel.github.io/writing/blinkledzynq.pdf But I am … Read more
For those unfamiliar with the FIX protocol, see: https://en.wikipedia.org/wiki/Financial_Information_eXchange https://www.fixtrading.org/ The FIX Protocol transfers data uncompressed and in ASCII form. The following data types are transferred like so: Integer Value To send the Integer 1,423, the TCP stream would look like this: Index ASCII Hex 0 ‘1’ 0x31 1 ‘4’ 0x34 2 ‘2’ 0x32 3 … Read more