john I stumbled upon a board called the “Zynqberry” which is supposed to mimic a Raspberry Pi but with a Xilinx Zyn-7000 FPGA board present. This board aims to be an FPGA-enabled version of the Raspberry Pi and comes with a 100MBit connector. Unfortunately it does not support 10 Gigabit. I mean, how could it with … Read more
If you are more of a hobbyist or doing this on the side, here are some possible board configurations that you can use to experiment with a 10 Gigabit connection. Remember, a SFP+ connection is synonymous with a 10 Gigabit connection. Zynq ZedBoard Zynq-7000 ARM/FPGA SoC Development Board If you are a student, you can … Read more
Now you can run LabVIEW FPGA on the hardware of your choice with the new “LabVIEW FPGA IP Export Utility”. That sounds great, but what’s that got to do with me? (quoting Rambo 3) Step 1 – Pick a non-National Instruments FPGA Board You will have to pick a non-National Instruments FPGA board that has … Read more
Okay, so what now? For starters, you should know that LabVIEW 2020 FPGA uses Vivado 2019.1. And we are going to start with the currently available version/mode – IP Export to Netlist. (The Source Code option requires you to email them to get it unlocked) What does this mean? It means that you can only use … Read more
Going to investigate what will be the biggest game changer for LabVIEW, FPGA’s and you. Okay, so the National Instruments website (http://www.ni.com) is pretty hard to navigate. I somehow saw the following under the ‘RELATED PRODUCTS’ section on some page that I have since been unable to find: Then I was finally told by my … Read more
So with the Coronavirus, the markets have been seeing increased volatility, and all the high frequency traders are making a lot of money, or losing a lot of money… I scrolled through the list of repositories on the fpganow github org and found a relevant project that deals with the parsing of market data only … Read more
I received an email from a reader asking me what controller I am using, so I figure I would make a new post with this information: (All links open in a new tab) PXIe-8105 Embedded Controller https://www.ni.com/en-us/support/model.pxie-8105.html PXIe-1062Q https://www.ni.com/en-us/support/model.pxie-1062q.html PXIe-6592R https://www.ni.com/en-us/support/model.pxie-6592.html And a picture (why not?):
So first off, I have merged my code to master, see it here: https://github.com/fpganow/MicroBlaze_lwIP And while I work on updating the README.md file, here are 2 slides for you to look at: So, if you have the appropriate NI hardware, you can clone down this repository and run 1 TCP and 1 UDP session to … Read more
As I was traversing my mental decision tree using a depth-first search model of digger deeper and deeper in to the lwip TCP/IP source code, I thought to myself that I should go back up the decision tree and take a deeper look at the tcpdump output. It turns out I was setting the source … Read more
What I have working right now: A UDP packet enters the FPGA via the 10 Gigabit PHY that is connected to the FPGA. The 10 Gigabit Ethernet MAC running on the FPGA consumes the Ethernet Frame and passes it in to a c++ application running inside the MicroBlaze Processor. The MicroBlaze Processor is running a … Read more