SZG-DUALSFP Update

I went to the Opal Kelly website again and noticed that there are a lot of menu options that I previously did not notice at the top menu. I found a sample board that uses their SZG-DUALSFP board: XEM7320 So now I can read the documentation for this board and be on my way! I … Read more

SZG-DUALSFP Howto?

So I have the Genesys Zynq UltraScale + MPSoC board, I bought the SZG-DUALSFP from Opel Kelly, and I want to figure out how to wire this thing up. What pin goes where? I dunno.  I spent some time reading the SFP+ specification.  Everything makes sense.  Then I read through the SYZYGY specification.  Again, things … Read more

Zynqberry Board Pause

After my previous post showing how to use the NI LabVIEW FPGA IP Export Utility to run LabVIEW FPGA code on a Zynqberry (http://fpganow.com/index.php/2020/09/28/zynqberry-with-breakout-board-and-labview/), I continued following the examples I could find on the internet and was able to connect to the board by using the PS (Processing System) built-int UART, and to communicate to … Read more

Zynqberry with Breakout Board and LabVIEW

Source Code: https://github.com/fpganow/Blink_LEDS Introduction There is a saying out there that goes ‘what are you going to do with an FPGA, blink a bunch of LEDs?’ Well… that saying is true.  Today I purchased a breakout board for the Zynberry and found an excellent guide on how to do just that: https://svenssonjoel.github.io/writing/blinkledzynq.pdf But I am … Read more

Zynqberry Update

So I followed the Zynqberry tutorial here: https://www.knitronics.com/the-zynqberry-patch/getting-started-with-the-zynqberry-in-vivado-2018-2 And was able to get a basic Xilinx SDK application working on my Zynqberry, but with a twist… I used the NI LabVIEW IP Export tool to incorporate some LabVIEW code.  For now a simple adder that just adds 2 8-bit unsigned integers and outputs a 16-bit … Read more

Parse FIX Messages Part 1

For those unfamiliar with the FIX protocol, see: https://en.wikipedia.org/wiki/Financial_Information_eXchange https://www.fixtrading.org/ The FIX Protocol transfers data uncompressed and in ASCII form.  The following data types are transferred like so: Integer Value To send the Integer 1,423, the TCP stream would look like this: Index ASCII Hex 0 ‘1’ 0x31 1 ‘4’ 0x34 2 ‘2’ 0x32 3 … Read more

[Updated] Ordered 10 Gigabit Configuration

[Updated]: It turns out there are 2 editions of this board, and it looks like the premium one with a 10 Gigabit SFP+ connector is not yet available in the USA.  However, I did some research and the lesser version of this board – the 3EV – has a SYZYGY connector, which supports SFP+ peripherals. … Read more

How TCP on an FPGA Looks Like

I did some research looking for existing TCP/IP FPGA Cores.  There are two basic types – 10 Gigabit and non-10 Gigabit.  There is also a range of free and commercial solutions out there, and I’m sure the usual caveats apply.  Free = no documentation or support, Commercial = super expensive.  Anyway, here is what I … Read more

Zynqberry Ordered

I stumbled upon a board called the “Zynqberry” which is supposed to mimic a Raspberry Pi but with a Xilinx Zyn-7000 FPGA board present. This board aims to be an FPGA-enabled version of the Raspberry Pi and comes with a 100MBit connector.  Unfortunately it does not support 10 Gigabit.  I mean, how could it with … Read more

Possible Configurations – Starter Boards

If you are more of a hobbyist or doing this on the side, here are some possible board configurations that you can use to experiment with a 10 Gigabit connection. Remember, a SFP+ connection is synonymous with a 10 Gigabit connection. Zynq ZedBoard Zynq-7000 ARM/FPGA SoC Development Board If you are a student, you can … Read more