LabVIEW
Network Connectivity Established via MicroBlaze and PXI-6592
So after some serious debugging, editing, and regenerating of the bitstream, I was able to send out an ARP response from the FPGA to my linux server, and for my linux server to send a UDP packet in to the MicroBlaze. This was all verified via UART debug statements. Now while I work on cleaning … Read more
LabVIEW FPGA, MicroBlaze, and UART – Full Guide
Working from scratch, I created a LabVIEW FPGA project that imports a MicroBlaze design that communicates with LabVIEW via a UART, and has the ability to change the elf file in a much shorter time frame than before. I did this by adding the MicroBlaze to the project after it had been exported to Vivado, … Read more
30,000 Foot View
I normally avoid shop words or “corporate speak” because I feel it dehumanizes us, but sometimes these phrases are necessary. So here is the “30,000 foot” view. And please pardon the appearance of my flow charts and diagrams, I am not a graphic designer… All images open in a new tab, so just click on … Read more
AXI4 + MicroBlaze != 64-bit
The 10 Gigabit MAC/transceiver gives me 64 bit data words. I currently think I am giving and getting 64 bit data words, but I am really only using 32 bits. I came to this conclusion after I tried reading a 64 bit word and saw the data was simply two repeated 32 bit words. Additionally … Read more
IP Integration Node vs CLIP
I wired up the 10 gigabit ethernet MAC to my MicroBlaze instance to my host computer and compiled/synthesized everything. I then turn on my “quiet” PXIe-1062Q and fire up my tester application and it did not work… I open up an isolated tester – “Fpga-Mac-Top.vi”, and it worked. I open up the isolated MicroBlaze tester … Read more
Pros and Cons of LabVIEW FPGA
Ever since I started developing this LabVIEW FPGA project that uses a MicroBlaze soft processor to process TCP streams, I have learned a lot and can comment on the pros and cons of using LabVIEW FPGA vs using a traditional Xilinx/Altera based FPGA development approach. For starters, LabVIEW FPGA blows every single other FPGA development … Read more
Screen Shot Generator for LabVIEW
I finished writing an application that exercises the first Port of the 10 Gigabit Ethernet Interface that is provided with the National Instruments PXIe-6592R board and as I started taking manual screenshots via the LabVIEW “File->Print” option I began to ponder, can this be done more easily? Or dare I say it “programmatically”? The LabVIEW … Read more
Monero (CryptoNight)
I spent some time analyzing the Monero CryptoCurrency source code to understand the algorithm, how it works and to see if it is doable with an FPGA via LabVIEW for FPGA, our secret weapon. I learned that there are 4 steps to the Monero “CryptoNight” algorithm and that step 3 is the part that does … Read more
New Code Added to GitHub – MicroBlaze MCS, IO Bus and LabVIEW
I just uploaded some code to GitHub that is a full demonstration on how to use LabVIEW FPGA 2017, the MicroBlaze MCS core and the IO Bus that is attached to the MicroBlaze MCS. Clone the following repository: https://github.com/JohnStratoudakis/LabVIEW_Fpga/tree/master/05_MicroBlaze_Mcs/02_MicroBlaze_Mcs_IO_Bus and open the LabVIEW project: https://github.com/JohnStratoudakis/LabVIEW_Fpga/blob/master/05_MicroBlaze_Mcs/02_MicroBlaze_Mcs_IO_Bus/02_MicroBlaze_Mcs_IO_Bus.lvproj Look at the Vivado 2015.4 project: https://github.com/JohnStratoudakis/LabVIEW_Fpga/blob/master/05_MicroBlaze_Mcs/02_MicroBlaze_Mcs_IO_Bus/MicroBlaze_Mcs_IO_Bus/MicroBlaze_Mcs_IO_Bus.xpr And finally, using … Read more