The National Instruments “LabVIEW 2018 FPGA Module Xilinx Compilation Tool for Vivado 2017.2 – Linux” is only officially supported on Red Hat Enterprise Linux and CentOS. CentOS is basically a clone of Red Hat Enterprise Linux, also known as RHEL. I like to joke and call it R-HELL. The reason is valid, Red Hat Enterprise … Read more
So it appears to me that Monero/CryptoNote mining has gained a lot of popularity lately, and this has led many people to this website. Let me note that LabVIEW FPGA is a proprietary tool that comes with a 30-day Evaluation. After that, you have to spin up a new virtual machine and reinstall LabVIEW to … Read more
If you purchase the National Instruments PXIe-6592R Board, retailing at $12,197.00 USD, I guarantee that you can run an FPGA accelerated 10 Gigabit network card in as much time as it takes for you to synthesize your code! Call Now, the number is 1-900-XXX-YYYY. Batteries not included, strings attached. But seriously, I have just cleaned … Read more
I have wired up the components of my 10 Gigabit FPGA Accelerated Network card with great care, and I decided to have my “tester” application skip the lwIP stack and to pass the received packet directly to the host for testing/verification purposes. Everything was checking out fine, the LabVIEW code looked flawless, the interface to … Read more
So here is the most simple, FPGA-based Network Interface Card that I know of. This application will start Port 0 of the 10 Gigabit Network interface that is provided by the PXIe-6592R (http://www.ni.com/en-us/support/model.pxie-6592.html) board by National Instruments, and will allow you to do any of the following: Check if any new ethernet frames have been received, and … Read more
I am getting real close to finishing my proof-of-concept FPGA-based network card that is based on the PXIe-6592 National Instruments Board which uses the Kinex-7 410t FPGA chip by Xilinx, and has 2GB of DDR3 RAM. Using the Arty Arix board, I was able to make sure that the MicroBlaze code running the lwIP TCP/IP … Read more
What is the product of 0x9D0BF6FDAC70AB52 and 0x6408F6540A1384CB? Well, according to LabVIEW for Windows, the answer is 0x2D90DE07C0C42206. According to C++ on OSX (without any optimizations, usage of Intel Intrinsic functions), the answer is also 0x2D90DE07C0C42206. The real answer is… 0x3D5E2BF7DCBCA6622D90DE07C0C42206. How do you get this number? You have to use compiler intrinsics, or calculate this value … Read more
So I wanted to implement a simple, stripped down version of the open-source lightweight IP stack “lwIP” (https://savannah.nongnu.org/projects/lwip/) inside my LabVIEW FPGA project that I can handle TCP and UDP data streams. I do not have a lot of experience with this, and I found that building such a project inside Vivado would take around … Read more
So I wanted to mention that I have all of my LabVIEW (and Vivado) code saved on a RAID-1 mirrored location on my network. From each of my workstations, I map the same network location to my Z drive. This way any and all issues of LabVIEW referring to absolute paths goes away. I do … Read more
So I have figured out how to use the MicroBlaze Core with an AXI-Stream FIFO, and I have also figured out how to export a project from Vivado by using the Vivado “Write Project TCL” option. See the following project: https://github.com/JohnStratoudakis/LabVIEW_Fpga/tree/master/06_MicroBlaze/04_lwIP_Ex You have to re-generate the Vivado Project and create a new SDK workspace in … Read more