New Code Added to GitHub – MicroBlaze MCS, IO Bus and LabVIEW

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I just uploaded some code to GitHub that is a full demonstration on how to use LabVIEW FPGA 2017, the MicroBlaze MCS core and the IO Bus that is attached to the MicroBlaze MCS.

Clone the following repository:

https://github.com/JohnStratoudakis/LabVIEW_Fpga/tree/master/05_MicroBlaze_Mcs/02_MicroBlaze_Mcs_IO_Bus

and open the LabVIEW project:

https://github.com/JohnStratoudakis/LabVIEW_Fpga/blob/master/05_MicroBlaze_Mcs/02_MicroBlaze_Mcs_IO_Bus/02_MicroBlaze_Mcs_IO_Bus.lvproj

Look at the Vivado 2015.4 project:

https://github.com/JohnStratoudakis/LabVIEW_Fpga/blob/master/05_MicroBlaze_Mcs/02_MicroBlaze_Mcs_IO_Bus/MicroBlaze_Mcs_IO_Bus/MicroBlaze_Mcs_IO_Bus.xpr

And finally, using the Xilinx SDK set your workspace to:

https://github.com/JohnStratoudakis/LabVIEW_Fpga/tree/master/05_MicroBlaze_Mcs/02_MicroBlaze_Mcs_IO_Bus/MicroBlaze_Mcs_IO_Bus/MicroBlaze_Mcs_IO_Bus.sdk

Now if you do not have access to LabVIEW from your current machine, I have included a screen shot for each VI with the words “Front” or “Back” added to the filename, and in the case where there are many case structures, I have added the case structure element number.

The example has three features:

  • Send a packet of data over the IO Bus to the MicroBlaze MCS and read the same packet back over the IO Bus
  • Write a value to GPI channel #1 and read the value multiplied by 2 over GPO channel #2
  • Read the values of GPO channels 1, 2, and 3

Now I am continuing to work on integrating the 10 gigabit ports with the MicroBlaze MCS and to get the lwip TCP/IP stack working on this board – NI PXIe-6592R.

 

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